 |
 |
CAPACITY:
128MB, 256MB, 512MB
CLOCK FREQUENCY:
100/133MHz
LVTTL interface:
3.3 Voltage +/-0.3V |
FEATURES:
168 edge connector pads
JEDEC standart
Serial Presence Detect support
MRS cycle with address key programs |
>> CAS latency: 2, 3 (clock)
>> Burst lenght: 1, 2, 4, 8 & full page
>> Burst type: Sequentia & Interleave |
|
 |
|
|
CAPACITY:
128MB, 256MB, 512MB
CLOCK FREQUENCY:
100/133MHz
LVTTL interface:
3.3 Voltage +/-0.3V |
FEATURES:
168 edge connector pads
JEDEC standart
Serial Presence Detect support
MRS cycle with address key programs
Stabilization time to achieve the PLL clock driver
2 Banks to be operated simultaneously or independently
|
>> CAS latency: 2, 3 (clock)
>> Burst lenght: 1, 2, 4, 8 & full page
>> Burst type: Sequentia & Interleave |
|
 |
 |
CAPACITY:
128MB, 256MB, 512MB
CLOCK FREQUENCY:
133/166MHz
JEDEC interface:
2.5 Voltage +/-0.2V |
FEATURES:
168 edge connector pads
JEDEC standart
Serial Presence Detect support
MRS cycle with address key programs
Stabilization time to achieve the PLL clock driver
2 Banks to be operated simultaneously or independently
|
>> CAS latency: 2, 2.5 (clock)
>> Burst lenght: 2, 4, 8
>> Burst type: Sequentia & Interleave |
|
 |
|
|
CAPACITY:
128MB, 256MB, 512MB
CLOCK FREQUENCY:
133/166MHz
JEDEC interface:
2.5 Voltage +/-0.2V |
FEATURES:
168 edge connector pads
JEDEC standart
Serial Presence Detect support
MRS cycle with address key programs
Stabilization time to achieve the PLL clock driver
2 Banks to be operated simultaneously or independently
Stabilization time to achieve the PLL clock driver
Near Zero Propagation delay of the address Bus
|
>> CAS latency: 2, 2.5 (clock)
>> Burst lenght: 2, 4, 8
>> Burst type: Sequentia & Interleave |
|
